top of page
img_technology_sec01-1.png

Digital Accelerators

Due to its sequential data movement between processor and memory unit, the traditional Von Neumann architecture leads to various limitations in performance.

img_technology_label_01.png
img_technology_sec01-2.png

Traditional analog in-memory computing

Analog in-memory computing (AIMC) technology addresses challenges in traditional digital accelerators such as memory bottleneck and energy inefficiency. However, it encounters other challenges such as retention and endurance.

img_technology_label_02.png
img_technology_sec01-3.png

AnalogAI Technology

Our innovative technology introduces novel synaptic devices using a new material with low leakage current and capacitor to solve the retention issue in capacitor based charge storage synapses.

img_technology_label_03.png

New synaptic device and co-optimized algorithm to eliminate the limitations of traditional analog in-memory computing (AIMC)

img_technology_sec02-1.png

Massively parallel inference and on-chip training

img_technology_sec02-2.png

Linear and symmetric weight update for accuracy and stability

img_technology_sec02-3.png

Low leakage current device and capacitor for longer retention

img_primary_logo_edited.png

©2024 AnalogAI. All rights reserved

bottom of page